1. Technical Field
The present invention relates to a data writing method for a non-volatile memory module, and a memory control circuit unit and a memory storage apparatus using the same.
2. Description of Related Art
The growth of digital cameras, mobile phones, and MP3 players has been rapid in recent years. Consequently, the consumers' demand for storage media has increased tremendously. A rewritable non-volatile memory is one of the most adaptable memories for portable electronic products such as laptop computer due to its data non-volatility, low power consumption, small volume, non-mechanical structure and high read/write speed. A solid state drive (SSD) is a memory storage apparatus which utilizes a flash memory as its storage medium. For these reasons, the flash memory has become an important part of the electronic industries.
A flash memory storage module includes a plurality of physical erasing units each having a plurality of physical programming units, and when writing data into the physical erasing unit, data must be written according to a sequence of the physical programming units. In addition, the physical programming units already written with data must be erased before it can be used again for writing data. In particular, the physical erasing unit is served as a smallest unit for erasing, whereas the physical programming unit is served as a smallest unit for programming (or writing). Therefore, in a management of the flash memory module, the physical erasing units may be divided into a data area and a spare area.
The physical erasing units of the data area are used to store data stored by the host system. More specifically, a memory control circuit unit in the memory storage apparatus may convert logical access addresses to be accessed by the host system into logical pages of logical blocks, and map the logical pages of the logical blocks to the physical programming units of the physical erasing units of the data area. Namely, in the management of the flash memory module, the physical erasing units of the data area are regarded as the physical erasing units already being used (e.g., already stored with data written by the host system). For instance, the memory control circuit unit may use a logical-to-physical address mapping table to record a mapping relation between the logical blocks and the physical erasing units of the data area, in which the logical pages in the logical blocks are corresponding to the physical programming units of the physical erasing units being mapped.
The physical erasing units of the spare area are used to alternately exchange the physical erasing units in the data area. More specifically, as described above, the physical erasing units written with data must be erased before it can be used again for writing data. Therefore, the physical erasing units of the spare area are designed to write the data for alternately exchanging the physical erasing units mapped to the logical blocks. Accordingly, the physical erasing units of the spare area are empty or available physical erasing units (i.e., in which data are not recorded or data are marked as invalid data).
In other words, the physical programming units of the physical erasing units in the data area and the spare data are alternately exchanged for mapping to the logical pages of the logical blocks, so as to store the data written by the host system. For instance, in case the logical access address to be written with the data from the host system is corresponding to one specific logical page of one specific block, the memory control circuit unit of the memory storage apparatus may get one or more physical erasing units from the spare area, write the data into the physical programming units of the gotten physical erasing units, and associate the physical erasing unit written with the data with the data area.
Particularly, during operations of the memory storage apparatus, in case the spare area is about to run out of the physical erasing units, the memory control circuit unit of the memory storage apparatus may arrange valid data in at least one physical erasing unit of the data area to the physical programming units not being used in other physical erasing units of the data area (hereinafter, known as “a valid data merging operation”). Accordingly, an erasing operation may be performed on the physical erasing units only stored with the invalid data, and the erased physical erasing units may be associated with the spare area, so that a mechanism of alternately exchanges may be maintained to execute subsequent write commands.
However, execution of said data merging operation is quite time consuming. Therefore, in case the host system requests to write (or back up) a great amount of data within a short time period (e.g., a request instructing to write the data in a buffer memory into the rewritable non-volatile memory when power is about to go off) and the physical erasing units of the spare area are about to run out, it may consume a great amount of time for the memory control circuit unit of the memory storage apparatus to execute the data merging operation. As a result, the data may fail to be written within a predetermined time, and the data stored by the system may be lost.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.